Flash memory is a particular kind of non volatile storage that can be electrically erased and rewritten. It has widespread uses in solid state memory, domestic portable electronics, mobile phones, computing, cameras, imaging, video cameras, logic devices, PDA, memory sticks. It is a specific type of EEPROM (electrically erasable programmable read only memory.) It was invented at Toshiba in 1980 and produced in quantities by 1988. Intel produced the first NOR type flash in 1987. Toshiba produced NAND flash in 1987.
So there are two types which are physical representations of the Boolean logical gates NOR and NAND which you remember from maths or IT, or computer programming. Recall that NAND (not and) for a two input condition is true if both inputs are 1, and false if any all other conditions. NOR (not or) is zero (false) if any leg does not have 1.
In early flash the entire memory had to be erased and completely rewritten, not now, where block are selected and erased and rewritten. It is a much cheaper form than EEPROM. Thus we have a device which is non volatile, random access, needs no power at rest, fast access, good kinetic shock resistance, water resistance up to a point, heat resistance,.
Flash NOR and NAND invented at Toshiba in 1980 and first produced by Intel in 1988. I had my first 64MB stick 10 years ago; today I have 16 and 32 GB sticks and some will have 64GB!
Note FPGAs in contemporary design of logic devices.
It works by utilising the ability of CMOS constructed ICs to store data bits in floating gate transistors called FETs. These are still significantly developed so that now multi level cells store more than 1 bit. In principle they are standard MOSFets but have two gates instead of one. Virtually all ICs of density and complexity are fabricated in MOSFETs in which NAND and NOR logic is pre eminent.
On top is a control gate but beneath it is a floating gate insulated by a layer of oxide. The FG is interposed between the CG and the MOSFET channel. Because the FG is electrically insulated any electrons are trapped there and will not discharge for years.
Erasing a large voltage is applied in the opposite polarity between CG and source, which pulls the electrons through the quantum tunnelling .
Programming – a single NOR flash cell in default is at output 1 because a current will flow through the channel when a V is applied to the control gate. V is typically greater than 5V
How long will it last; no moving parts, so very long. Most will do >100,000 R/W /erase cycles. Micron and similar devices will exceed a million cycles.
Wear levelling; data is shunted round to level out use and bad blocks are quarantined.
For comparison; a human hair is 100 micro metress across and a red blood cell is 8um across.
In 1971 IC processing sizes were 10um, 1975 3um, 1982 1.5um, 1989 800nm, 1994 600nm, 1995 350nm, 1998 250nm, 1999 180nm, 2000 130nm, 2011 22nm